Business Forum Panel
Life Begins at 65—Especially for Mixed Signal
Tuesday, January 30 | 2:00 pm – 3:30 pm
The demand for analog/mixed-signal IP blocks has never been greater, especially at 65 nm and below. Today, you can get a complex analog front-end, USB PHY, or serial interconnects designed by the IP provider such that anyone can integrate them into their digital SoC. Or can they? Do companies really need to spend millions of dollars sustaining analog designers to do mixed-signal design? On the other hand, are the integration and support challenges so great that one should not rely on buying mixed-signal IP externally? Join us for a debate among experts from each "camp," then make up your own mind.
Chairperson
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Stephan Ohr
Research Director of Analog Semiconductors
Gartner
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Mr. Ohr is the research analyst for analog and power management ICs at Gartner Dataquest Research. Formerly, he covered the analog semiconductor industry for EE Times. He is the recipient of a 1985 Jesse Neil Award (the trade press equivalent of the Pulitzer Prize) for some of the earliest writings on RISC microprocessors. He has served on review committees for analog texts and organized the analog tutorials and seminar tracks for CMP's Embedded Systems Conference. Mr. Ohr's electronics industry experience includes GE and Signetics (now Philips Semiconductor). He has an engineering degree from the New Jersey Institute of Technology and an M.A. from Rutgers.
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Panelists
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Robert Dobkin
Vice President of Engineering and Chief Technical Officer
Linear Technology
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Dr. Dobkin is a founder of Linear Technology. At Linear, he was responsible for all new product development until 1999. Prior to founding Linear Technology in 1981, Mr. Dobkin was director of advanced circuit development at National Semiconductor for 11 years. He has been intimately involved in the development of high-performance linear integrated circuits for more than 30 years and has generated many industry-standard circuits. Mr. Dobkin holds more than 50 patents pertaining to linear ICs and has written more than 50 articles and papers. He attended the Massachusetts Institute of Technology.
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Dieter Draxelmayr
Fellow
Infineon
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Dr. Draxelmayr is the Infineon Fellow for analog design. His main tasks are consulting in any kind of analog and mixed-signal related questions and the exploration of new technologies with respect to analog design. Dr. Draxelmayr is also serving in the ISSCC program committee. His group has been the first to publish working FinFet analog building blocks. He has designed a variety of analog and mixed-signal circuits, mostly A/D-converters and sensors. Mr. Draxelmayr holds approximately 50 patents and has written a number of conference papers.
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Joachim Kunkel
Vice President and General Manager
Synopsys
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Prior to joining Synopsys, Mr. Kunkel was a managing director of CADIS GmbH, a company he had co-founded in 1989 in Aachen, Germany. CADIS GmbH focused on the development of system-level design tools for digital signal processing and providing specialized design services for wireless communication systems. From 1984 to 1989, Mr. Kunkel was a research assistant at the Aachen University of Technology's Lehrstuhl fuer Elektrische Regelungstechnik, where he conducted research in the area of system-level simulation techniques for digital signal processing, with special emphasis on parallel computing.
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Boris Litinsky
Senior Staff Engineer
Juniper Networks
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Mr. Litinsky is developing a high-speed networking chip for Juniper Networks. Before assuming his current role, he was at RF Micro Devices, where he worked on the industry's first WLAN chipset with PCI-Express. Before that, he worked at a number of small start-ups, including ComTier, Jasmine Networks, and Azanda Network Devices, focusing on communications and networking products such as switch fabrics and network processors. Mr. Litinsky previously worked at IBM, Compaq, Tektronix, and Intel, developing a number of PCI northbridge, southbridge, super I/O, and graphics ASICs. He graduated with a master's in electrical engineering from Georgia Tech.
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John Martin
Vice President, Strategic Alliances and Partnerships
Chartered Semiconductor Manufacturing
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Dr. Martin is responsible for the evaluation, negotiation, and initial implementation of Chartered's alliances for manufacturing and technology. Previously, Dr. Martin served as the company's CTO and vice president of technology development. Dr. Martin brings more than 25 years of experience in the semiconductor industry. He has served in management and research positions at a number of companies, including Motorola, Rockwell International Microelectronics, and Argonne National Laboratories.
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Bob Pease
Staff Scientist
National Semiconductor
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Mr. Pease has designed about 20 analog ICs, including power regulators, voltage references, and temperature sensors. He has written roughly 65 magazine articles and holds approximately 20 U.S. patents. He is a senior member of the IEEE. Mr. Pease wrote the definitive Troubleshooting Analog Circuits (May 1991), now in its 17th printing. He has published more than 240 columns of Pease Porridge in Electronic Design magazine. He was inducted into the Electronics Engineering Hall Of Fame in October 2002 and is the dean of NSC's Analog University.
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