Just what roles designers and chip manufacturers must play in the DFM movement is not clear. Designers are now being asked to consider the manufacturability of the design at the beginning while manufacturers are still fighting to keep their margins. This panel will examine just what both sides can do to address the issues surrounding DFM, such as how the design community can account for the limitations of lithography and RET; what the manufacturing community can provide—such as data—to designers; and how lithography simulation can bridge the gap between design and manufacturing.

Dylan McGrath Senior Editor EE Times

Mr. McGrath is a senior editor covering EDA for EE Times. His responsibilities include moderation of eedesign.com and the EE Times Daily Newsletter. He has nearly 10 years of experience in semiconductor industry journalism and public relations/marketing.

Carlo Guardiani Senior Director, DFM Engineering PDF Solutions

Mr. Guardiani joined PDF Solutions in March 1999 as director of statistical design. Before that, he held multiple positions at ST Microelectronics in Agrate, Italy, and Grenoble, France, which ultimately led to his position as R&D manager of advanced research in power and timing methodologies. Mr. Guardiani holds several U.S. and international patents and is the author of more than 40 IEEE conference and journal papers. He has a degree in physics from the University of Parma in Italy.

David Lan Senior Manager, Design Methodology TSMC North America

In his nine years of service at TSMC, Mr. Lan has been responsible for providing solutions in chip implementation, verification, and DFM to TSMC customers. Prior to his current position, he held management positions in various ASIC companies and fabless design companies in CAD, chip integration, and verification area. He received his M.S. in computer engineering in 1987 from the University of California, Santa Barbara.

Mike McAweeney Vice President, DFM Marketing Cadence Design Systems

Mr. McAweeney is an industry veteran, having spent 13 years at Cadence. Over the past 18 years, he has held technical, sales, business development, and marketing roles at a number of electronic design-related companies, including Simplex Solutions and LSI Logic.

Peter Rabkin Program Director Xilinx

Mr. Rabkin is responsible for process-to-design integration and DFM. Prior to Xilinx, Mr. Rabkin was director of advanced technologies at PDF Solutions and held a number of senior managerial and technical positions at companies such as Hynix Semiconductor, Hyundai Electronics, and Silvaco International. He was involved in development and transfer to volume production of a wide variety of semiconductor processes, devices, and products, spanning from cutting-edge CMOS, to advanced memories, to devices of power electronics and high-performance SiGe and III-V heterojunction applications.

Craig West Director of Applications Toppan Photomasks

Mr. West was named Toppan Photomasks' director of applications in November 2001. In this position, he leads a group specifically focused on meeting the technical needs of semiconductor manufacturers using advanced photomask technology. He also guides Toppan group's technology-planning function for roadmap requirements and timing. Since joining the company in 1990, Mr. West has held a variety of executive-level positions in which he managed a broad array of engineering assignments. Prior to joining the company, West was involved with R&D in advanced-manufacturing technology for new products and processes, including factory automation, process control and systems design for E. I. DuPont de Nemours & Co.