Soumya Chandramouli, Ph.D. Student, Georgia Institute of Technology
Franklin Bien, Ph.D. Candidate, Georgia Institute of Technology
Hyoungsoo Kim, Ph.D. Student, Georgia Institute of Technology
Dr. Edward Gebara, Research Faculty Member, Georgia Institute of Technology
Dr. Joy Laskar, Joseph M. Petit Professor of Electronics, Georgia Institute of Technology

As data rate and/or data reach increases beyond the original specifications in a network, existing infrastructure such as copper channels or optical fibers acts as a bottleneck due to inter-symbol interference caused by bandwidth limitations. Equalizer circuits such as feed-forward equalizers and decision-feedback equalizers offer a cost-effective solution for improving the signal integrity through legacy channels by compensating for the channel loss. Traditional digital equalizer approaches become unfeasible at 10 Gbps with current cost-effective silicon processes due to process constraints. In this paper, analog equalization techniques implemented in a 0.18-um CMOS technology demonstrate 10 Gbps equalization over backplanes and optical fibers.