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7-TA3
Advanced Design Techniques to Support Next-Generation Backplane Links beyond 10 Gbps
Tuesday, January 30 | 10:15 am – 10:55 am

Brian Kirk, Signal Integrity Engineer, Amphenol TCS
Marc Cartier, Signal Integrity Engineer, Amphenol TCS
Tom Cohen, Principal Development Engineer, Amphenol TCS
Jason Chan, Signal Integrity Engineer, Amphenol TCS

Copper backplane links are typically designed to support multiple generations of upgradable plug-in modules with successive increases in-line speed. Choices of cost, density, and risk must be made to facilitate this upgrade path while maintaining cost-effectiveness and reliability for the immediate market requirements. Progress is being made on various specifications for Ethernet, fiber channel, and other protocols that are expected to exceed 10 Gbps. Consequently, system designers are evaluating channels that support 20+ Gbps. This paper investigates advanced design techniques, including alternative plated-through (PTH) structures for connector attachment, advanced shielding technologies, and novel approaches to mitigate mode conversion effects.

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