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Schedule

2-TP2
IP Solves the Increasing Challenge of Implementing an Interface to Off-Chip DDR SDRAM
Tuesday, January 30 | 2:50 pm – 3:30 pm

Graham Allan, Director, Marketing, MOSAID Technologies Incorporated
Jody Defazio, Director, Engineering, MOSAID Technologies Incorporated

Today's SoC designers face an increasingly daunting task when they are required to develop an SoC that requires a DDR SDRAM interface. Problems include the requirement for both ASIC and mixed-signal design flows, complex verification, intimacy with the DRAM components (and the road maps) and short chip life cycles and time to market. Fortunately, there is a semiconductor IP solution that addresses these problems and reduces development costs as well. Licensing an advanced process-independent DDR SDRAM memory controller in combination with the process-specific physical interface provides a silicon-proven solution that also significantly reduces overall design risk.

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