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Connecting the World of Electronic Design
InfoVault Publications DC Home
DesignCon 2007
Register Today
Schedule

2-TA2
Request-Response Trace for Bus Performance Analysis
Tuesday, January 30 | 9:20 am – 10:00 am

Neal Stollon, Director, MIPS
Bruce Ableidinger, Director of Business Development, MIPS

A bus traffic monitoring approach, a bus request-response trace (bus RRT) uses on-chip instrumentation (OCItm) IP to provide performance analysis of on-bus level-latency measurements for complex SoCs. In complex SoCs, which typically include an increasingly large number of embedded processors and other cores, the interconnect takes on new complexities to allow software development that maximizes performance for each processor and at the systems level.

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