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Rune Jensen, Senior Design Engineer, ReShape
Thomas O'Dwyer, Philips Semiconductor

This paper highlights the difficult design challenges associated with the physical design of a 10M-gate multiprocessor SoC for HDTV. The design team used a novel physical design methodology that automates the construction of GDSII (full-chip builds from netlists in less than 24 hours) and abuts blocks to realize the density of flat design.