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J. Thomas Pawlowski, Senior Director, Architecture and Development, and Senior Fellow, Micron Technology

Reduced latency DRAM (RLDRAM^TM) bridges the gap between traditional SRAM and DRAM and offers designers a new level of memory device performance. This paper explores RLDRAM's architecture, features, and utility, along with several of the applications for which this exciting new technology is intended. In addition, the paper presents detailed performance comparisons against other memory architectures, providing designers the tools and understanding they need to make the optimal device selection for their system's performance requirements.