Ken Umino, Design Services Consultant, Synopsys
Pete Thoeming, IC Design Engineer, Thomson Silicon Components

Double data rate (DDR) designs have become common in many interfaces and ASICs. DDR uses both edges of a clock to transfer data so that it has twice the throughput of a single data rate (SDR) application at the same frequency. In a 1x clock DDR design, the clock driving the logic and the DDR clock are the same frequency. In a 2x clock DDR design, the clock driving the logic is twice the frequency of the DDR clock. This paper covers the comparison of a 1x clock DDR design and a 2x clock DDR design. The designs, timing and constraints, and physical implementations are compared. When a 2x clock DDR design can be used, it is superior to a 1x clock DDR design in many respects.