1-TP2
Optimizing Memory Interfaces for Specific Applications
Tuesday, January 30 | 2:50 pm – 3:30 pm
Olivier Despaux, Senior Strategic Applications Engineer, Xilinx, Inc.
Most new digital systems require amounts of memory larger that can be embedded in ASSP or FPGA devices. This paper discusses two aspects of the design: memory interface architectural choices and implications; and several implementation aspects of the memory interface, aimed at increasing robustness and reducing power for the interface. Experimental results are used to illustrate the concepts addressed in the paper.
