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1-TA4
Low-Latency PCI-Express Impacts System Architecture Tradeoffs
Tuesday, January 30 | 11:05 am – 11:45 am

Pushkar Upadhye, Senior Design Engineer, Ingot Systems
Hemant Gavali, Senior Design Engineer, Ingot Systems

New implementations of PCI-Express have been able to reduce the large latency found in early PCI-Express designs, and this has made it possible to use PCI-Express in innovative ways to simplify system architecture tradeoffs. For example, in a low-latency implementation, distributed memory can be consolidated if accesses are fast enough over PCI-Express to hit system performance requirements. This can reduce memory cost, power, and board space requirements significantly. This paper will review several real-world system tradeoffs made possible by low-latency PCI-Express implementations that can be used in a wide variety of system designs.

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