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12-TA4
Comparing Time-Domain and Frequency Domain Techniques for Investigation on Charge Delivery and Power-Bus Noise for High-Speed Printed Circuit Boards
Tuesday, January 30 | 11:05 am – 11:45 am

James Drewniak, Professor, University of Missouri-Rolla
Giuseppe Selli, Graduate Student, University of Missouri-Rolla
Jun Fan, Consultant Engineer, NCR
James L. Knighten, Technical Consultant, NCR
Bruce Archambeault, Distinguished Engineer, IBM
Malteo Cocchini, Ph.D. Student, University of Missouri-Rolla
Samuel Connor, Senior Engineer, IBM
Liang Xue, Engineer, National Semiconductor

The performance of a power distribution network is critical to high-speed digital circuits in terms of signal integrity and radiated emission. This paper studies charge delivery of a power distribution network, as well as power bus noise resulting from device switching, in the time domain. The effects of capacitor location, power/ground plane pair, board size, and dielectric material are discussed.

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