DesignCon 2006

DesignCon 2006

Presented By

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Technology Pavilions

Technical Panels

Monday, February 6

4:45 pm - 6:00 pm

How to Choose Bypass Capacitors

Wednesday, February 8

3:45 pm - 5:00 pm

Embedded Capacitance and Embedded Capacitors: Technology Progress and Applications

TecForums

Monday, February 6

9:00 am - noon

TF-MA1
Thermal Issues in Board Design

TF-MP3
Comparison of Power Distribution Network Design Methods

Thursday, February 9

9:00 am - noon

TF-THA2
Embedded Capacitance and Embedded Capacitors: Overview on Modeling and Applications

Technical Sessions

Tuesday, February 7

8:30 am - 9:10 am

6-TA1
Designing of Printed Circuits Using Substrates with Combined Embedded Capacitance and Resistance for Better Electrical Performance and Higher Integration

12-TA1
EMC Simulation of Complex High-Performance PCBs and Shielding Effectiveness

9:20 am - 10:00 am

6-TA2
Impedance Characterization and Design Optimization of PCB Embedded Passive Components

12-TA2
Impedance Matched Lossy Decoupling for PCB Power Delivery and PCB/Heatsink Radiated EMI Noise

10:15 am - 10:55 am

6-TA3
Dielectric Material Properties: Essential Inputs to an Accurate Signal-Integrity Analysis and High-Reliability Design

10:15 am - 10:55 am

11-TA3
Full-Wave Simulation and Validation of a Simple and Complex Via Structure

2:50 pm - 3:30 pm

8-TP2
Attenuation in PCB Traces Due to Periodical Discontinuities

11:05 am - 11:45 am

7-TA4
Effective Techniques for SERDES Channel Design

2:00 pm - 2:40 pm

11-TP1
S-Parameter Characterization of Sockets

Wednesday, February 8

8:45 am - 9:25 am

12-WA1
Effective Modeling and Analysis of EMI Effects on Printed Circuit Boards

9:40 am - 10:20 am

8-WA2
Developing a "Physical" Model for Vias

12-WA2
Finding the Root Cause of an ESD Upset Event

2:00 pm - 2:40 pm

8-WP1
Practical Design Considerations for 10- to 25-Gbps Backplane Copper Serial Links

12-WP1
Analyzing and Minimizing FPGA Simultaneous Switching Noise in Printed Circuit Boards

13-WP1
PCB Loadboard Design Challenges for Multi-Gigabit Devices in Automated Test Applications

2:50 pm - 3:30 pm

7-WP2
Single-Port TDR Test for Calibrated Two-Port S-Parameters

8-WP2
Designing Scalable 10-Gbps Backplane Interconnect Systems Utilizing Advanced Verification Methodologies

12-WP2
Time- and Frequency-Domain Analysis of Decoupling Capacitor Distance on Printed Circuit Boards