Ingot Systems is the leading supplier of Electronic Design Solutions (EDS) to the electronics market. Ingot EDS Technology is the embodiment of years of system design experience- a comprehensive design
platform of pre-designed functions, verification and test environments and methodologies. It allows Ingot to quickly and easily create custom tailored Design Service Solutions (for System, ASIC and FPGA designs) and IP Solutions (for Memory Controller, Video and Network Processing) optimized for your specific application.
· IP4001 DDR2 Memory Controller- 800MHz
Ingot Systems' IP4001 is an advanced, DDR1 and DDR2 memory controller. It is designed to provide ultra-low latencies while providing the highest possible performance. The core is designed with high frequency operation in mind and can support 400MHz clock speeds (800Mbps) in 90nm and 0.13um process.
The core implements advanced scheduling algorithms to optimize access to the DRAM, sophisticated request merging and bypass optimizations for high performance, and multiple priorities to differentiate between critical and non-critical accesses.
· IP4010 Memory Interface PHY
The IP4010 DDR/SDR SDRAM PHY is a flexible and advanced solution for ASIC and SoC designers who need to get the ultimate performance out of their memory interface using the least amount of silicon area. The IP4010 supports standard SDRAM, DDR SDRAM, or both. The PHY supports a wide variety of standards of each type, including single-data-rate JEDEC standard SDRAM and Mobile SDRAM, double-data-rate JEDEC standard DDR and DDR2 SDRAM, and Mobile DDR SDRAM.
· IP7001 PCI Express IP Core
Ingot IP7001 PCI Express IP core implements the PCI Express Endpoint functionality. The IP is fully compliant with the PCI Express Base Specification v 1.0a. The core is designed to be configurable and scalable to meet a variety of computing and communication platforms. The core is software compatible with the PCI model and supports key PCI features. The IP supports advanced feature such as Flow Control, Data Integrity and Error Handling, Hot-plug/Hot- swap support. The highly modular and configurable architecture allows the core to be easily implemented on FPGA and Standard Cell technologies.
