PCI Express design verification presents significant challenges to SoC developers, both in terms of validating compliance to the PCIe specification and in verifying interoperability with other PCIe design implementations.
Ensuring compliance and interoperability requires a robust verification solution that addresses model accuracy, simulation speed, intelligent traffic generation, coverage reports, transaction analysis, compliance test suites, and support for modeling other PCIe design implementations.
This presentation will discuss the problems encountered in PCIe design and state-of-the-art tools and techniques for verifying compliance and interoperability. It will then provide an in-depth look at Denali PureSpec and PureSuite, the industry's most comprehensive commercial verification IP and compliance suite solution for PCIe.
David Lin, Vice President, Product Marketing, Denali