Much has been written about the strengths and weaknesses of dual-Dirac as a model for jitter measurement. The aim of this TecPreview is to give a gentle introduction to the topic and how the dual-Dirac relates to practical measurements that can be made with sampling scopes and BER-based instruments. It will also explore the effect that long patterns can have in mixing a Gaussian-like deterministic jitter (DJ) distribution in with the truly Gaussian distribution that comes from random jitter (RJ) and how this can affect the answer for total jitter (TJ), DJ, and RJ.

Bent Hessen-Schmidt, Vice President, Business Development, SyntheSys Research, Inc.

The BERTScope S analyzer and BERTScope CR clock recovery enable design engineers to test higher-speed (excess of 1 Gbps) electrical components, serial links, and interfaces for computer memory, busses, and back planes, including the FB DIMM, Serial ATA, and PCI Express II standards. These innovative instruments also address test needs for electrical storage, enterprise and telecommunications components, transceivers and network equipment, including OIF CEI, 4X/8X Fibrer Channel, and 10G Ethernet standards.