Taking the next step in fabrication process improvement, Fujitsu offers world-class 65 nm CMOS technology for ASIC and COT customers. Fujitsu's 65nm technology has shrunk gates by 25% compared with the 90 nm technology. This highly competitive 65 nm technology features options for maximizing performance and minimizing power consumption. The technology thus suits both performance-oriented applications and mobile applications that combine superlative performance with long battery life. Features of the technology include the 30 nm long gate, only 75% the size of the CS100 transistors; 20% to 30% faster performance than the 90 nm generation; doubled transistor density compared with the 90 nm generation; and 50% reduced SRAM cell area compared with the 90 nm generation. Fujitsu will start tape-out acceptance for the 65 nm technology in early 2006.
Asif Hazarika, Senior Marketing Manager, Fujitsu Microelectronics America, Inc.
Paul Little, Manager, Methodology Development, Fujitsu Microelectronics America, Inc.