Frank Schirrmeister, ChipVision Design Systems
Jan Jezek, Design Engineer, ChipVision Design Systems
Eike Schmidt, Chief Architect, ChipVision Design Systems

This case study will show the optimization of a ghost canceling design at the pre-RT level. Using a variety of optimization steps, a savings potential of 58 percent for energy consumption and a savings potential of 75 percent for average power consumption will be identified. These optimizations include register clock gating, algorithm transformations such as loop merging, memory access optimization, and quality of services optimizations by way of adjusting data path bit width. In addition, design considerations with respect to performance tradeoffs for power optimizations were made.