DesignCon 2006

DesignCon 2006

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2005 Paper Awards

DesignCon 2005 Paper Award winners:

Chip-Level Design Category

"Ultra-Wideband Radio Design for Multi-Band OFDM 480-Mbps Wireless USB"

Lawrence Williams, Daniel Wu, Eldon Staggs, and Albert Yen

"Hardware Implementation of a Tree-Based IP Lookup Algorithm for OC-768 and Beyond"

Florin Baboescu, Suresh Rajgopal, Lun-Bin Huang, and Nick Richardson

"'Fearless Partitioning': An Efficient Approach to the Challenges of a True Multi-Chip Integration into a Single SoC"

Herve Menager and Ramaprasad Kadiyala

Board-Level Design Category

"Hybrid Stripline Analysis II: Propagation Characteristics, Crosstalk Effects, and PCB Routability"

James Broomall, Tamera A. Yost, Glen Walther, and Gregg Wildes

"Performance Model for Inter-Chip Busses Considering Bandwidth and Cost"

Brock J. LaMeres and Sunil P. Khatri

System-Level Design Category

"The Recessed Probe Launch: A New Signal Launch for High-Frequency Characterization of Board-Level Packaging"

Young Kwark, Christian Schuster, Lei Shan, Christian Baks, and Jean Trewhella

"Total Jitter Measurement at Low Probability Levels Using Optimized BERT Scan Method"

Marcus Müller, Ransom Stephens, and Russ McHugh

"Measurements of Impedance, Current, and Worst-Case Noise on Chip Power Delivery System under Operating Conditions"

Isaac Kantorovich, Victor Drabkin, Chris Houghton, and Jim St. Laurent

Functional Verification Category

"Maximizing Synergies of Assertions and Coverage Points within a Coverage-Driven Verification Methodology"

Richard Ho

Business Issues Category

"Impact of Diagonal Routing Architecture on Traditional Cost vs. Performance Trade-Offs in Digital IC Design"

Aki Fujimura