More and more, we hear first-tier IDMs complaining that EDA vendors aren't developing tools for the next great leap in IC, package, and PCB design-while EDA costs are taking up an increasingly greater portion of a design project's budget. What are these first-tier IDMs to do? More and more, we hear the IDMs saying they have to develop the EDA tools they need internally. Increasingly, IC designers are finding greater value in making their own tools rather than working with the increasing shortcomings of commercial EDA tools that they buy. Is the value of commercial EDA tools decreasing-and with it, the EDA industry's potential for growth?
Conversely, we also hear about bright spots of growth and user satisfaction in the EDA landscape. For example, Dataquest continues to tout ESL as a veritable savior for the EDA economy. Various investors in EDA highlight areas they see as profitable for funding. DFM/DFY seems to be one of those spotlight areas.
So is EDA in a death-knell-level crisis, becoming obsolescent because the commercial vendors cannot keep up with the technology demands of its most important customers? Or is EDA merely in a predictable lull, in the quiet period that will be the precursor to an explosive outpouring of new design technology from commercial EDA vendors that users will eagerly embrace?
This panel will debate the state of EDA in today's exacting and demanding design world-whether we are in a situation where the design tools themselves are a hindrance to next-stage chip, package, and PCB design, or vital technology to accomplish next-level design.
Richard Goering
Group Editorial Director for EDA
EETimes
Mr. Goering is the group editorial director for design automation at EETimes. He has observed and chronicled the EDA industry for more than 20 years. After receiving his B.A. in journalism from UC Berkeley in 1973, Mr. Goering began his career at Peninsula Electronics News by covering the beginnings of Silicon Valley. In the early 1980s, Mr. Goering worked as a technical writer and then became an editor for Computer Design magazine, where he covered electronic design automation, then referred to as computer-aided engineering. In 1988 he joined the staff of Personal Engineering & Instrumentation News, and in 1989 he became the editor of High Performance Systems. In 1990 Mr. Goering signed on with EETimes, where editor in chief Brian Fuller observes, "His eternal quest to break the 'next big thing' in EDA has won him loyal readers."
Jack Harding
Chairman, President, and Chief Executive Officer
eSilicon Corporation
Mr. Harding has more than 20 years of executive management experience in the electronics industry. Prior to co-founding eSilicon, Mr. Harding served as president and chief executive officer of Cadence Design Systems, in addition to having been president and chief executive officer of Cooper & Chyan Technology, as well as executive vice president of Zycad Corporation. He began his career with distinction at IBM.
Mr. Harding earned his bachelor's degree in economics and chemistry from Drew University and has served as vice chairman of its Board of Trustees. Mr. Harding is a senior fellow at the Institute for Development Strategies and a member of the Board of Visitors for the School of Public and Environmental Affairs at Indiana University. He is a member, and former Steering Committee member, of the Council on Competitiveness, a Washington, D.C.-based organization dedicated to the global competitiveness of the United States. Harding is currently serving a one-year term with the National Academies as a member of the committee on Software, Growth, and the Future of the U.S. Economy. Mr. Harding is a frequent lecturer on innovation and entrepreneurship, and has served on many boards of public and private companies.
Jim Hogan
Private Investor
Mr. Hogan has worked in the semiconductor industry for over three decades. His experience includes time as a senior executive in electronic design automation, semiconductor intellectual property, semiconductor equipment, and fabrication companies. Immediately prior to joining Telos Venture Partners in 2004, he was senior vice president of business development of Artisan Components. Previously, he was senior vice president of business development and the senior member of the office of chief technologist at Cadence Design Systems. Mr. Hogan was a Cadence executive fellow and held several positions at Cadence including president of Cadence Japan, corporate vice president of marketing, and corporate vice president for field pperations. He was also chief operating officer of Smart Machines, Inc., a semiconductor equipment automation company.
Len Perham
Chairman
Optimal Corp.
Mr. Perham has more than 30 years of executive leadership and semiconductor industry experience. Mr. Perham is also chairman of the Board at NetLogic Microsystems (NETL), a fabless semiconductor company based in Mountain View, California, and a senior advisor to AsiaTech Management, a venture capital company based in Santa Clara, California. From 1991 to 2000, Mr. Perham served as chief executive officer of Integrated Device Technology, Inc. (IDTI). He was appointed president and elected to the Board of Directors in 1986. During his 16-year tenure, Mr. Perham incubated several companies under the IDT umbrella, including Galileo Technology (acquired by Marvell Technology); Quantum Effect Devices (QED, acquired by PMCS-Sierra); Monolithic System Technology (MoSys); Clear-Logic, Inc.; and Centaur Technology. Before joining IDT, Mr. Perham was president and chief executive officer of Optical Information Systems, Inc., a division of Exxon Enterprises. He was also a member of the founding team at Zilog, Inc. and held management positions at Advanced Micro Devices and Western Digital.
Gary Smith
Vice President and Chief Analyst
Gartner Dataquest
Mr. Smith is vice president and chief analyst at Gartner Dataquest, where he is also part of the Design and Engineering group and serves in the Electronic Design Automation Worldwide program. As such, he oversees annual market share and forecast reports, in addition to contributing to a Market Trends report that estimates the size of the EDA market and provides five-year growth forecasts. He also provides an annual assessment of how end users are using their design tools, what methodologies are employed, and to what degree are they satisfied with today's tools. Compiling this information gives him unique insight into the EDA market.
Prior to joining Gartner, Mr. Smith consulted in design methodology and specialized in the ASIC end of the semiconductor business. While at LSI Logic he was involved in the development of the RT-level design methodology, as well as some of the first attempts at customer-designed ICs. He earned a B.S. in engineering from the U.S. Naval Academy at Annapolis, Maryland.
Richard Tobias
Chief Technology Officer and Vice President of Engineering
Pixelworks
Mr. Tobias joined Pixelworks in May 2005 as chief technology officer and vice president of engineering. Previously, Mr. Tobias held the positions of vice president of the ASIC and Foundry business unit and vice president of engineering in the System LSI group at Toshiba America Electronic Components, Inc. Mr. Tobias also served as vice president of engineering of the Systems group at QuickSilver Technology, Inc., which acquired White Eagle Systems Technology, Inc., a DSP and embedded system turnkey design company that he founded. He was also president and chief operating officer of White Eagle Systems Technology, Inc. and chief engineer at AcuVoice, Inc., in addition to having held various engineering positions with Stanford Telecommunications, Inc., Data General, and Advanced Micro Devices. Mr. Tobias holds a B.S. in electrical engineering from the University of Minnesota and an M.S. in mathematics from Stanford University.