Kevin Grundy, President and Chief Executive Officer, Silicon Pipe
Mike Resso, Business Development Manager, Agilent Technologies
Gary Otonari, Engineering Project Manager, GigaTest Labs
Haw-Jyh Liaw, Director of Systems, Aeluros

The design and implementation of high-speed backplanes requires substantial effort in pre-prototype modeling and post-prototype test and measurement. Recent advances in measurement-based modeling methodologies for legacy backplanes have reduced the overall design cycle time. This presentation will introduce a design case study that details a novel backplane architecture that uses flexible microstrip printed circuit board for high-speed line card channels. Unique SERDES packaging technology that allows these high-speed channels to be isolated from crosstalk effects will be shown. Advanced signal-integrity analysis tools will be used to show the performance benefits of a scalable 10-Gbps backplane system.