Marc Levitt, Vice President, Design for Manufacturing, Cadence Design Systems

The migration to advanced nanometer process technologies at and below 90 nm requires significant changes in models, tools, and design flows to reliably achieve first silicon success and acceptable volume production yields. In order to address manufacturing-related yield factors such as chemical metal processing (CMP), sub-wavelength lithography effects, and sensitivity to process variation, current design methods must be augmented with new types of models and more detail for existing models for devices and interconnect, drawing on more accurate extraction methods. New types of tools will join existing tools in more comprehensive design flows, needed to ensure reliable prediction of silicon performance of nanometer IC designs.