Ajay Bhatia, Manager, SUN Microsystems
Sagar Reddy, Sun Microsystems
Shashank Shastry, Sun Microsystems

Fabs are facing tremendous challenge to control variations in vital parameters, but optics and resolution are limiting control. These variations are required to be incorporated in chip design and analysis in order to avoid silicon failure. Conventional worst-case critical-path analysis techniques are not adequate enough to encompass interaction of inter-die and intra-die variations, number of critical paths, and yield targets. An alternate probabilistic methodology of analysis is elaborated to address shortcomings of conventional deterministic methodology. DFM rules and their impact are also elaborated in this presentation.