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Previous DesignCons: 2005
2005 Archive
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TF6
Recent Developments in Signal Integrity Measurement and Analysis
Monday January 31 | 9:00am - 12:00pm

Craig Emmerich, Senior Product Marketing Engineer, Wavecrest
Mike Li, Ph.D., Chief Technology Officer, Wavecrest

As mainstream PC interfaces exceed 1 Gbps, conventional synchronized global clock based architecture is replaced by asynchronous serial data communication where the clock is recovered at the receiver by a clock recovery unit. In this tech forum, we will talk about the latest developments in PC communication standards like PCI Express, Serial ATA, and the upcoming FB-DIMM. We will review the basic architecture of these interfaces and how to determine the noise transfer functions for each link. We will then demonstrate how to measure and analyze different noise and jitter components using Time Interval Analyzers (TIA), BERT and Oscilloscope testers.