Arch Zaliznyak, Senior Member of Technical Staff, Altera Corporation
Binh Ton, Senior Design Engineer, Altera Corporation
Chong H. Lee, Director, Integrated Circuit Design, Altera Corporation
Rakesh H. Patel, Senior Director, Altera Corporation

This tutorial will provide a better perspective on designing for FPGAs by giving an overview of FPGA architecture and the underlying software flow for synthesis, placement, routing, and timing analysis. We will describe the process by which new FPGA logic, routing and architectures are defined, with examples from recent research publications. Further topics will include issues in designing hardware for FPGAs, including RTL coding to target FPGA features and the effective use of dedicated resources, as well as an overview of the many new features such as CDR transceivers and dedicated memory interfaces, which are now common on FPGAs.