This panel will discuss the following topical issues:
- JNB Correlation; A review of jitter correlation issues and their impact on high-speed design activity. High-end designers will share their challenges and methods of overcoming. Test & Measurement firms will provide insight to their test methodologies.
- Serial Signal Equalization; High speed serial signals being sent over dense circuit designs are requiring additional signal equalization to appear robust at the receiver. How do these signals get characterized properly and what linear feedback issues develop as a result of these signal types?
Chris Loberg
Design and Manufacturing Market Segment Manager, Tektronix
Mr. Loberg is responsible for providing Tektronix's solution set for digital design validation, debug and standards compliance to the computer and semiconductor industries. In an earlier role with the company, he was the Product Line Marketing Manager for the Optical Parametric Test Product Line, providing design support for companies developing high-speed optical technologies for telecommunications. Prior to his stint withTektronix, he was Vice-President of Marketing for Utah Scientific, a manufacturer of Telecom Switching Equipment; and a Vice-President of Sales and Marketing for Texscan, a manufacturer of Cable Television infrastructure equipment.
Panelists
John Calvin
Applications Engineer, Tektronix
Mr. Calvin has 12 years of signal acquisition and processing experience, and is currently actively involved in defining measurement techniques for many of the emerging multi gigabit serial data-comm standards. He is a member of many of the leading-edge serial standard trade associations and has worked to bridge the technology between physical Test & Measurement solutions and industry for the last 7 years. He is a regular presenter of signal integrity and physical measurement tracks at many professional trade/technology forums.
Ken FergusonManager, Test Technology Engineering, PMC-Sierra
Mr. Ferguson is responsible for finding creative solutions to test challenges. He spent 3 years in characterization and production test method development and yield enhancement for thin-film superconducting magnetic sensors (SQUIDs) with CTF Systems before joining PMC-Sierra in 1994 as a product engineer. He has been involved in test method development for PMC's high-speed serial products since 1995,
Eric Kvamme
Manager and Principal Engineer, Maxtor
Mr. Kvamme is the principal engineer and manager of Maxtor's Advanced Interface Engineering group. He has over 14 years experience in the mass storage industry with a focus on interface signal integrity. He authored the ATA/66, 100, and 133 extensions to the ATA/ATAPI specification. He is a leading participant in the SATA Electrical, Jitter, and Measurement subcommittees.
Mike Peng Li
Chief Technology Officer, Wavecrest
Dr. Li pioneered jitter separation method (Tailfit) and DJ, RJ, and TJ concept and theory formation. He has been involved in setting and contributed to standards for jitter, noise, and signal integrity for leading serial data communications, such as Fibre Channel, Gigabit Ethernet, Serial ATA, and PCI Express. Currently he is the Co-Chairman for the PCI Express jitter standard committee. Dr. Li has more than 10 years experiences in high-speed related measurement instrumentation, testing, and analysis/modeling algorithms/tools, with applications in IC, microprocessor, clock, serial data communications for both electrical and optical, and wireless communication. Prior to joining Wavecrest, Dr. Li had worked in both industry and academic institutions. He is experienced in measurement system and Automated Test Equipment (ATE) architectures, hardware, software, performance, and accuracy.
Mark Marlett
Principal Design Engineer, LSI Logic
Mr. Marlett has been designing, validating and characterizing serial interface physical layer transceivers and phase locked loops for Fibre Channel, SONET, PCIE, SATA and data moving backplanes since 1991. He began his career at Cypress Semiconductor. In 2003 he joined LSI Logic's High Speed Interface Engineering (HSIE) organization as a principal design engineer.
Ransom Stephens
Applied Electrodynamics Scientist, Agilent Technologies
Dr. Stephens is an Applied Electrodynamics Scientist with Agilent Technologies. He spent thirteen years in basic research specializing in precise measurements of rare processes while working on experiments across the United States, from Stanford to Fermi Lab to Cornell, and in Europe, at CERN in Geneva. After several years as an Associate Professor of physics at the University of Texas at Arlington, he entered the private sector as Director of Advanced Technology for a start-up company in 1999 and joined Agilent Technologies in 2001 where he specializes in the analysis of physical layer processes in high data rate systems.