Thomas Anderson, Director of Technical Marketing, Verification Group, Synopsys, Inc.

The use of formal analysis to verify properties about a design holds great promise but is not yet widely adopted. This talk surveys the benefits and challenges of formal property verification, with examples drawn from available commercial tools. The increasing acceptance of assertions in simulation provides a path to the wider use of formal analysis, since these same assertions can be used as properties. This talk concludes by presenting a proposal for a combined simulation/formal assertion-based flow that offers lower barriers to entry and has the potential to become a mainstream approach.