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Previous DesignCons: 2005
2005 Archive
Highlights | Schedule | Exhibitor List

1-TA4
Raising the Level of Abstraction for Design and Verification: SystemC and System Verilog in a Multilanguage Environment
Tuesday, February 1 | 11:00am - 11:40am

Victor Berman, Group Director, Strategic Third-Party Programs, Cadence Design Systems, Inc.

This paper traces the development of language-based methods for design and verification of electronics, from the emergence of the first nonproprietary hardware description languages (HDLs) in the mid-'80s to the current movement to higher levels of abstraction typified by the new languages-SystemC and SystemVerilog. These languages are not seen as replacing existing languages and methods, but as enhancing their capabilities and acting as a framework for unifying the elements of full system design. Since design methods continue to evolve and grow as layers on existing methods, the success of these new languages will be largely determined by their ability to coexist and cleanly interface to both existing languages and languages yet to come.