Ali Burney, Senior Product Planning Engineer, Altera
Sanjay Charagulla, System Architect, Component Product Planning, Altera Corporation

This paper will focus on SPI-4.2 interface and the implementation in programmable logic device. It will present an analysis of the SPI-4.2 interface and identify some of the barriers that limit interface performance. The paper will then identify techniques a designer can implement, by using programmable logic, to overcome these barriers. Silicon measurement results will illustrate the conclusions of the paper. Through this a paper, a system designer will be able to better understand SPI4.2 interfaces, and the tradeoffs between interface methodologies.