Technology nodes of 90nm and below hold the promises of smaller and faster chips that use less power. However, the physics of finer process silicon will shatter design practices and methods that have worked in >130nm design flows. In particular, design flows will need to be cognizant of increasing demands for mobile applications and the problems of increasing subthreshold currents in 90nm technologies. Solutions to solve these issues will require updates to design methodology as well as modernization of characterization and modeling of nanometer silicon. This panel discussion will focus on required implementation solutions and methodologies that will ensure low-power design success when transitioning to finer process technologies.

Chairperson

Tets Maniwa, Editor-in-Chief, Chip Design Magazine, has been involved in the electronics industry for many years. He has a decade each in engineering, marketing, and publishing. He has designed ICs and medical equipment, marketed ASICs and opto-electronics, and written about all of these technologies. Mr. Maniwa has a BSEE from the University of California at Berkeley and an MBA from St. Mary's College in Moraga, CA.

Panelists

Krisztian Flautner, Principal Researcher, ARM, focuses his research on simple ideas that enable high-performance low-power processing platforms to support advanced software environments. In the research group at ARM, he is currently working on next-generation ARM architectures. Mr. Flautner holds Ph.D., M.S.E., and B.S.E. degrees in computer science and engineering from the University of Michigan.

Donald Friedberg, Director, Design Methodologies, Agere Systems, is responsible for providing the tools Agere's chip designers use in creating integrated circuits (ICs). This includes the design flows used in both custom and standard product design, computer aided design (CAD) sourcing and CAD support. Mr. Friedberg joined Agere Systems' predecessor, AT&T Bell Laboratories, in 1995. After joining the company, he designed microprocessors, embedded digital signal processors (DSPs) and ICs for cellular phones.

Stephen King, Director, Engineering, Magma Design Automation, has 19 years of experience managing semiconductor design and EDA product development and service delivery with industry leading companies like Synopsys, Avant!, and Advanced Micro Devices. Mr. King began his professional career as an ASIC designer with a data communications division of Harris Corporation. He holds a bachelor of science degree in electrical engineering from Texas A&M University.

Steve Majors, Director, SoC Design Services, Core Technology Group, Mindspeed Technologies, has implemented high-speed multi-million gate digital and mixed-signal SoC devices for set-top box, communications processor, network processor, and other network infrastructure applications. Prior to Mindspeed, Mr. Majors worked for Motorola at the joint IBM/Motorola Somerset Design Center, Austin, Texas from 1996 to 1997.

Dennis Monticelli, Chief Technologist, Analog Products Group, National Semiconductor, is a National Semiconductor Fellow in addition to his current role, the company's highest technical position. He has generated several major technical innovations at National and holds 20 patents in integrated circuit design, three of which have "medalled" in National's Patent of the Year awards.