Highlights | Schedule | Exhibitor List

Robert Haller, Principal Consulting Engineer, Signal Integrity Software
Brian Arsenault, Principal Hardware Engineer, EMC
Douglas Burns, Chief Consultant, Signal Integrity Software
Barry Katz, President and Chief Executive Officer, Signal Integrity Software

Computer and storage systems contain many printed circuit boards that utilize redundant pieces of logic and technology. New technologies are running faster signals, increased rise times, clocking off both edges, at reduced timing margins. The reuse of signal integrity and timing analysis environments with their associated models results in significant savings in manpower and schedule. This paper explores the key aspects in the design analysis reuse methodology, including the exploration of types of data that needs to be portable between designs and how mechanical changes to the PCB design can be handled without loss of reuse. Reuse within a design as well as between designs is also discussed.