H211
Signal Integrity Characterization of Printed Circuit Board Parameters
Gautam Patel, Signal Integrity Engineer, Teradyne Connection Systems

H221
Bus LVDS (BLVD) Technology in Heavily Loaded Backplanes
Edward Sayre, Engineer, North East Systems Associates, Inc.

C211
Addressing Cost, Performance, and TTM Objectives Simultaneously
Don Kortge, Principal Member-Technical Staff, Charles Industries, Ltd.
Hemant Shah, Director-CAE Marketing, Xynetix Design Systems, Inc.

C221
High-Performance Backplane Application with the Texas Instruments GTL+
Shankar Balasubramaniam, Applications Engineer-Advanced Networking Solutions, Texas Instruments

C231
Fibre Channel Tutorial
Charlie Wang, Associate Professor, University of Colorado-Colorado Springs

I211
Designing a Second-Generation Gigabit-Ethernet NIC
Randy Bolster, License Sales and Training, Packet Engines, Inc.

I221
System-on-a-Chip Design and Verification
Amjad Qureshi, System-on-Chip Design Manager, Sand Microelectronics, Inc

P211
Abstraction and Modeling in VHDL Functional Simulation
Gary Peyrot, Field Applications Engineer, Vantis Corporation

S212
Behavioral Synthesis: Ready for Primetime
Taher Abbasi, President, ByteK Designs
Pradeep J. Fernandes, Chief Technical Officer, Meropa

S222
On-Chip Decoupling Capacitor Design and Modeling Methodology
Nam Pham, Manager, IBM Corporation
Moises Cases, Senior Technical Staff Member, IBM Corporation
Bhupinder Singh, Advisory Engineer, IBM Corporation

S232
A Virtual Prototype System for PDA Software Development
Yair Raz, Director-Customer Applications, CoWare, Inc.
Mark Naumann, Design Engineer, Motorola

H212
A Tour of the IBIS Accuracy Specification
Robert Haller, Principal Hardware Engineer, Compaq Computer Corporation
Greg Edlund, Principal Hardware Engineer, Compaq Computer Corporation
Peter LaFlamme, Application Engineer-Backplane Products Group, Fairchild Semiconductor

H222
Pentium II GTL+ Interface Design
Hansel Collins, Chief Executive Officers, TriCN Associates LLC
Ronald Nickel, President, TriCN Associates

H232
Designing Redundant Clock Trees with PLL Clock Drivers
Todd Pearson, Applications Engineering Manager, Motorola Inc.

H242
Improving Signal Integrity of IEEE1394: Physical Layer with Time-Domain Reflectometry
Michael Resso, Product Manager, Lightwave Division, Hewlett-Packard Company
Mike Lee, Hardware Engineer, Zayante, Inc.

C212
Reuse of Configurable Stacked Protocol Utilities for Verification of Datacom ASICs
Serag Gadelrab, ASIC Design Engineer, Nortel Semiconductors
Allan Silburt, Senior Manager-Silicon System Modeling, Nortel Semiconductors
Greg Ward, Advisor-System Verification, Nortel Semiconductors
Mario Dufresne, Manager-Hardware Modeling and Verification, Nortel Semiconductors
Adrian Evans, ASIC Verification Engineer, Nortel Semiconductors
Joel Bolduc, ASIC Verification Engineer, Nortel Semiconductors

C222
Network Management in Switched Gigabit Environments: Part of the Hardware Infrastructure
Alak Deb, Vice President and CTO, XaQti Corporation

C232
Arrayed Optics—The Next Paradigm Shift—A Roadmap to Terabit Class Equipment
Scott Schaeffer, Technical Marketing Manager, AMP Incorporated
Beth Murphy, Product Manager-Global Optical Cable Assemblies Division, AMP Incorporated

I212
High-Performance Reconfigurable Signal Processor with Adaptive VLIW Architecture
George Landers, Vice President, Infinite Technology Corporation
Neal Stollon, Senior Member Technical Staff, Infinite Technology Corporation

I222
ASIC Core Verification with Emulation
Alan Singletary, Advisory Engineer, IBM Corporation

I233
Tips and Techniques for Creating Synthesizable, Reusable High-Level Building Blocks in VHDL
Subbu Meiyappan, Design Engineer, VLSI Technology, Inc.
Peter Chambers, Engineering Fellow, VLSI Technology, Inc.
Ken Jaramillo, Design Engineer, VLSI Technology, Inc.

P212
A Designer's Guide to CPLDs and FPGAs
Reno Sanchez, Applications and Architecture Development Manager, Philips Semiconductors Programmable Products Business Line

P222
Reconfigurable Design Enviroment for FPGA/CPLD Design: A Case Study
Raja Medicherla, Senior Programmable Solutions Engineer, Viewlogic System, Inc.

Conference Panel
Copper Interconnect: The New Design Environment
James Glaze, Vice President, Semiconductor Industry Association

H213
Accurate Models for Signal Integrity Analysis
Henry Hung-Jen Wu, Design Engineer, HP EESOF

H223
Controlling Clock Uncertainty in High-Speed System Designs
Mark McKee, Packaging and Signal Integrity Engineer, Cisco Systems

H233
Measuring and Analyzing PCI Performance in Real Applications
Doug Abbott, Principal Consultant, Intellimetrix

C213
Kalman Filtering for Enhanced Global Positioning Accuracy
Zhimin Ding, Senior Staff Engineer, Philips Semiconductor

C223
Implementing Gigabit Ethernet over Copper Now
Sailesh Rao, Scientist, Level One Communications, Inc

C233
Time-Triggered Protocol: Fault-Tolerant Serial Communications for Real-Time Embedded Systems
Ross T. Bannatyne, Manager-Systems Engineering, Motorola SPS

I213
Solving Design Issues for a 1394 Camera
Gervais Fong, Senior Product Marketing Manager, Sand Microelectronics

I223
Code Translation of a Reusable Soft IP
Shivakumar Chonnad, Senior Design Engineer, Synopsys Inc.

I234
Effective Memory Interfacing for System-on-Chip Designs
Bill Cordan, Director, PALMCHIP Corporation

P213
An Embedded Processor Core Stethoscope
Kenneth Smith, Engineer, Hewlett-Packard Company

S213
Integrated Software, Hardware and Verification for Programmable ASIC Systems
Robert Devins, Software Engineer, IBM Corporation

S223
The Effects of Signal Integrity in Sub-Micron Chip Design
Dr. Lynne Green, CMOS Circuit Analysis and Development Engineer, IP Infrastructure Business Group, Duet Technologies

S233
Formal Verification of the Hewlett-Packard V-Class Servers
Harry Foster, Senior Member-CAD Technical Staff, Hewlett-Packard Company

H214
The Voodoo and Black Magic Associated with High-Performance Backplane Designs
Andrew Grace, Principal Strategic Marketing Engineer, Fairchild Semiconductor
Dr. Howard Johnson, President, Signal Consulting, Inc.
Thomas Hawkins, President, Signals & Systems Engineering, Inc.
William Spreen, Manager-Product Definition, Fairchild Semiconductor Corporation
Dr. Edward Sayre, President, North East Systems Associates
Andrew Berding, President, Arizona Digital, Inc.

H224
Taking Advantage of Delay-Correlation Effects to Design High-Speed Digital Circuits
Daniel Notestein, President, SynaptiCAD Inc.

I214
Design and Application of a Configurable On-Chip Bus and Bus Controller
Elliot Mednick, Processor Architect, Lexra, Inc.

I224
Novel Design Techniques for the Design of an Embedded Microprocessor Core
Simon Butler, Member of Technical Staff, SandCraft Inc.

I235
Creating and Deploying Design Methodology Framework
Hakim Mesiwala, Director-Research and Development, Advanced CAD Department, Cirrus Logic
H. Ravindra, Vice President-Research and Development, Advanced CAD Department, Cirrus Logic
Jed Krohnfeldt, Director-Design Methodology, Advanced CAD Department, Cirrus Logic

P214
Selecting a Graphical HDL Entry Tool
John Vincent, Senior Engineer, Eastman Kodak Company

S311
Memory Controller Design Considerations for Direct RDRAM Memory Subsytems
Ramprasad Satagopan, Member of Technical, Rambus, Inc.

S321
Achieving Timing Convergence between Synthesis and Place and Route
Jay McDougal, Engineer/Scientist, Hewlett-Packard Company
Bill Young, Engineer/Scientist, Hewlett-Packard Company

S331
Debugging Aids for Systems-on-a-Chip
Ross Bannatyne, Systems Engineering Manager, Motorola SPS

H311
Decoupling Capacitors Techniques for High-Frequency Board Designs
Moises Cases, Senior Technical Staff Member, IBM Corporation

H321
Designing Three-Point AGP Solutions Using Simulation Techniques
Patrick Riffault, Principal Designer, Cadence Design Systems
Denise Ham, Applications Engineer for Graphics Products, Intel

H331
Probes and Set-up for Measuring Power-Plane Impedances with Vector Network Analyzer
Dr. Istvan Novak, Signal Integrity Staff Engineer, Sun Microsystems Inc.

C311
IS-54 Digital Cellular Modem Design
Karl Kobata, Senior ASIC Design Engineer, JTA Research Inc.
John Tramel, Senior ASIC Design Engineer, JTA Research Inc.

C321
Creating a Switched Network Architecture for Gigabit Ethernet: The Need for a New Switching Paradigm
Alak Deb, Vice President and CTO, XaQti Corporation

C331
Hardware Split Radix FFT Designed Using C2Verilog Compiler
Donald Soderman, Chief Executive Officer, CompiLogic

I311
Hard IP Migration and Reuse
Tom Quan, Vice President-Corporate Marketing, Duet Technologies

I321
ASIC Rapid Prototyping through Design Reuse and Software Models
Bruce Harmon, Director-Research and Development, Logic Modeling Group, Synopsys, Inc.

I331
Protecting Your Virtual Components—A Model and Techniques
Ken Hodor, Strategic Marketing Manager, Actel Corporationn

P311
Boosting Design Productivity with High-Performance, High-Density Programmable ASICs
Madhu Duggirala, Director, Actel Corporation

P321
Method and Implementation of Intelligent Peripherals
Glenn Baxter, Staff Research Engineer, Xilinx, Inc.

S312
Design for PowerPC G4 Microprocessor
Eric Barkin, Electrical Engineer-Circuit Designer, Motorola
Jose Alvarez, Electrical Engineer-Circuit Designer, Motorola
Michael Daddeo, Electrical Engineer-Circuit Designer, Motorola
Franklin Lassandro, Electrical Engineer-Circuit Designer, Motorola
Minh Vo, Electrical Engineer-Circuit Designer, Motorola
Paresh Patel, Electrical Engineer-Circuit Designer, Motorola
Joshua Siegel, Electrical Engineer-Circuit Designer, Motorola
Carmine Nicoletta, Electrical Engineer-Circuit Designer, Motorola

S322
Electrical Interconnect Guideline Development for Noise Avoidance in a High-Performance Microprocessor
Loizos Vakanas, Development Staff Member, IBM Corporation
Moises Cases, Senior Technical Staff Member, IBM Corporation
Howard Smith, Advisory Engineer, IBM Corporation

S332
Unique MP Verification Techniques for Symmetric Multiprocessing Systems
Leonard Giordano, MP Verification, Motorola Somerset Design Center
Daniel Fields, MP Verification, Motorola Somerset Design Center
Jamshed Jalal, MP Verification, Motorola Somerset Design Center
Nathan Steinke, MP Verification, Motorola Somerset Design Center

H312
The Role of Capacitors in High-Speed Systems Design
Sergio Camerlo, Signal Integrity Manager, Cisco Systems
John Fisher, Signal Integrity Engineer, Cisco Systems

H322
Using Both VHDL and Verilog for Board-Level Simulation
Richard Munden, CAE Engineer, Acuson Corporation

H332
Introducing IEEE 1149.1 Boundary Scan into the Board-Level Development Process
Michael Wondolowski, Senior Hardware Engineer, Network Equipment Technologies

C312
System Verification: Essential for Digital Wireless System-on-a-Chip Designs
Ralph Zak, Vice President of Marketing, Aptix Corporation

C322
Next Generation Networks: Chasing Bandwidth with GTL+
Shankar Balasubramaniam, Applications Engineer, Texas Instruments

Conference Panel
IP: Real-Life Experiences
James Uhl, President and Publisher, Integrated System Design

P312
FIFO Applications Enabled by Embedded RAM in FPGAs
John Birkner, Vice President, QuickLogic Corporation

P322
Embedded 66 MHz PCI Functions on an FPGA
Jim Jian, Field Application Engineer, Lucent Technologies Microelectronics
Barry Britton, Director, FPGA Product Planning
Rick Stuby, Manager, FPGA H/W Product Planning

Conference Panel
Signal Quality and Emissions at High Speed
Henri Merkelo, IEEE Fellow and Director, University of Illinois

C313
Modeling and Simulation of a Mixed DSP/RF Transmitter in a Coded OFDM WLAN Application
Cory Edelman, Application Engineer, Hewlett-Packard Company

C323<br> Operating a 1 Gbps HIPPI-6400
Hansel Collins, Associate, TriCN Associates LLC

C332
HDSL2: Designed to Operate with Mixed Services
Jim Quilici, Technical Marketing Manager, Level One Communications

I312
A Comparison of USB and 1394 Video Camera Designs
Tom Anderson, Director of Engineering, Virtual Chips Products, Phoenix Technologies Ltd.

I322
Verification Code Reuse
Brad H. Smith, Senior Engineer, Qualis Design

I332
Anatomy of a Protected Model
Steve Carlson, Vice President-Marketing, Escalade Corporation
Tim Hopes, EDA Engineering Manager, ARM Ltd.

P313
Advantages of Designing with Low-Voltage Programmable Logic Devices
Percy Aria, Design Engineer, Cisco Systems
Anita Weemaes, Senior Product Marketing Engineer, Vantis Corporation
Apurva Patel, Member of Technical Staff, Vantis Corporation

H313
Design-Oriented Analysis of Power Bus for High-Speed Systems
Om Mandhana, Advisory Engineer-Netfinity Server Group, IBM

H323
A Sound Strategy for Managing the Performance of High-Speed ULSI Packaging
Gregory P. Fitzgerald, Senior Technical Market Manager, Cadence Design Systems
Kevin Roselle, Senior Member-Consulting Staff, Cadence Design Systems

H333
Design for Debug
Pascal Dornier, President, PC Engines

C314
Wireless Local Loop from a Switching Point of View
Masoud Loghmani, Chief Technical Officer, Logic Tree

C324
OC-48/2.5 Gbps Interconnect Engineering Design Rules
Edward Sayre, Engineer, North East Systems Associates, Inc.

C333
Design and Implementation Issues of Soft IP for All-Digital Broadband Modems
Scott R. Powell, Chief Scientist-Intellectual Property Division, Mentor Graphics Corportation

I313
IP-Based Architecture Exploration
Lan-Rong Dung, Research Scientist, Rockwell Science Center
Mohamed Ben-Romdhane, Team Leader-Codesign Research, Rockwell Science Center
Marius Vassilou, Program Director, Rockwell Science Center

I323
Rapid Prototyping to Verify Complex Systems-On-Chip
Naeem Zafar, Vice President-Marketing, Quickturn Design Systems

I333
When Does It Make Sense to Design for Reuse?
Mark Peryer, Technical Marketing Manager-Soft Cores, Mentor Graphics Corporation

Conference Panel
When Is a FPGA Too Big?
Ron Wilson, Bureau Chief, EE Times

H411
PCB Impedance Design, Beyond the IPC Recommendations
Eric Bogatin, Product Manager, Ansoft Corporation

H421
CompactPCI at 66 MHz
Robert Cutler, High-Speed Interconnection Consultant, AMP Incorporated

C411
Versatile Embedded Controllers for Thin Client Applications
Al Chame, Senior Application Engineer, Motorola

C421
Advances In Dense Wavelength Division Multiplexing
Robert Gadient, Principal, Robert Gadient Consulting

I411
IP-Based Architecture Synthesis
Mohamed Ben-Romdhane, Team Leader-Codesign Research, Rockwell Science Center
Lan-Rong Dung, Research Scientist, Rockwell Science Center
Marius Vassilou, Program Director, Rockwell Science Center

I421
Building a Legally Sound Intellectual Property Portfolio
Dennis Fernandez, Partner, Dennis & Irene Fernandez LLP, Patent Attorneys
Irene Fernandez, Partner, Dennis & Irene Fernandez LLP, Patent Attorneys

P411
Retargeting FPGAs: A PCI Card Design Example
Paul McMahon, Hardware Engineer, Chrysalis-ITS, Inc.

S412
Timing Impact Minimization of JTAG Designs
Dr. London Jin, Manager-ASIC Division, Adaptec

S422
A Semi-Custom Circuit Library Methodology for System-on-Chip Designs
Moises Cases, Senior Technical Staff Member, IBM Corporation
Michael Cseri, Staff Engineer, IBM Corporation
Kelly Johnson, Engineer/Scientist Technical Staff, Motorola

H412
The Impact of PWB Construction of High-Speed Signals
Chad Morgan, Electronics Packaging Engineer, AMP Incorporated

H422
Using I2O in Embedded PCI Systems
Mark Easley, Vice President-Marketing, PLX Technology, Inc.

C412
Optimizing Network Performance in Standard High-Volume Servers
Chris Pettey, Member of Technical Staff, Jato Technologies

C422
Home Networking Using Existing Residential Phone Wiring
Prasan Pai, Technology Planning Manager, Rockwell Semiconductor Systems, Inc.

I412
Design of a Dynamically Configurable Content Addressable Memory
Tim Melchior, Senior Principal Engineer, UTMC Microelectronic Systems

I422
Intellectual Property Business Models: Who Will Be the Microsoft of the EDA Industry—And the Next Bill Gates?
Dan Caldwell, Intellectual Property Sales, Mentor Graphics Corporation