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Schedule

12-TA4
Power-Integrity Analysis of DDR2 Memory Systems during Simultaneous Switching Events
Tuesday, February 7 | 11:05 am - 11:45 am

Ralf Schmitt, Engineering Manager, Rambus, Inc.
Joong-Ho Kim, Signal-Integrity Engineer, Rambus, Inc.
Kyung Suk (Dan) Oh, Engineering Manager, Rambus, Inc.
Xingchao (Chuck) Yuan, Engineering Manager, Rambus, Inc.

Simultaneous switching noise (SSN) in systems using single-ended drivers poses significant design challenges as data rates continue to increase. This presentation will analyze the impact of SSN on a DDR2 memory system utilizing wirebond package for controller and operating at 667MHz. The presentation will not only focus its attention on the supply rail where the output driver is located, but also on the other supply rails where sensitive circuits are located. It will demonstrate that the noise coupled into these sensitive supply rails, through either other supply rails or signals, can be significant. In addition, the presentation will provide a methodology for finding data patterns that cause the worst-case supply noise on each supply rail. Finally, the simulated supply noise is correlated with hardware measurements to validate the modeling approach.